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Independent Recruitment Consultant (freelancer)

Senior Engineer II - Validation

Independent Recruitment Consultant (freelancer)

Hyderabad, Telangana, India · 全职

抢先申请

经验
5–9 yrs
薪水
INR 2,000,000 – INR 3,000,000 / year
职位空缺
1
发布
2小时前
工作模式
在办公室
学历
B.Tech or M.Tech in Electronics
合格
Any graduate can apply for this position.
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职位描述

Role Description

As a Senior Engineer II in Validation, the candidate will be responsible for developing system and FPGA designs that simulate end-user applications tailored for specific products. This includes preparation and execution of detailed system and product validation plans for both new and existing silicon products, with meticulous recording and communication of results.

Responsibilities

  • Design and develop system and FPGA implementations to represent varied use cases in customer-like environments.
  • Create and implement comprehensive validation plans covering new and current silicon products and projects.
  • Gain a strong understanding of the hardware architectures, use models, and system-level design needed to leverage silicon features fully.
  • Author and maintain well-structured code in Verilog, VHDL, and C for embedded processors.
  • Perform FPGA-based validation on hardware boards.

Candidate Profile and Skills

  • Excellent command of written and spoken English communication.
  • Proficient with simulation tools such as ModelSim and synthesis tools like Synplicity.
  • Experience in synthesis, placement constraints, static timing analysis (STA), and timing closure for high-speed designs.
  • Strong expertise in silicon validation, failure analysis, and debugging techniques.
  • Advanced skills in board-level debugging within lab environments using oscilloscopes, digital analyzers, integrated logic analyzers (Identify, Chipscope, SignalTap, Reveal), and protocol exercisers/analyzers.
  • Familiarity with embedded software development in C/C++ is beneficial.
  • Basic knowledge of embedded processors and AMBA protocols (APB, AHB, AXI) plus peripherals such as SPI, I3C, and UART.
  • Practical experience with systems-level design and debugging involving high-speed serial communication protocols including USB3.2, DisplayPort, HDMI, JESD204B, JESD204C.
  • Understanding of SERDES architecture, including equalization settings and debugging.

Educational and Experience Requirements

The ideal candidate should hold a B.Tech or M.Tech in Electronics and possess 5 to 9 years of experience in the industry.

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