Principal Researcher for Novel DRAM

Overview

We are seeking an experienced Principal Researcher to lead innovative projects focused on advanced DRAM technologies, including Si-based 3D DRAM and DRAM with novel channel oxide materials. The role involves spearheading developments in conductive materials, junction formation, 3D architecture integration, and new memory transistor designs.

Key Responsibilities

• Lead research on advanced low-resistivity conductive materials for sub-10nm metal lines and interconnects, focusing on materials screening, thermal stability, work function engineering, and readiness for high volume manufacturing.
• Define and develop ultra-scaled junction formation processes with low thermal budgets to achieve precise doping and activation for high aspect ratio 3D structures.
• Create novel characterization techniques to accurately measure junction profiles in complex three-dimensional geometries.
• Tackle the challenges of 3D architecture and silicide integration by developing robust n-type silicide processes optimized for complex geometries with low contact resistance and high thermal stability.
• Innovate in novel DRAM array memory architectures and research transistor channel materials to enhance device design and performance.
• Advance key process integration technologies as well as design test element groups, peripheral circuits, and structural/electrical testing methods.
• Conduct comprehensive simulations in materials, processes, and devices to support development goals.

Required Qualifications

• Master's degree or higher in Physics, Materials Science & Engineering, Chemistry, with PhD preferred.
• Minimum of 8 years' experience in DRAM memory development, including at least 5 years leading architecture or key technology initiatives.
• Deep understanding of TLC, QLC, PLC multi-bit memory mechanisms, including their effects on read/write algorithms, error correction codes, and wear leveling.
• Strong systems thinking skills with a proven ability to coordinate cross-functional teams spanning circuit design, device engineering, firmware, verification, testing, and product development.
• Excellent skills in preparing technical documentation and communicating complex technical decisions.
• Preferred expertise includes ECC architectures (BCH/LDPC), DRAM controller collaboration, and knowledge of reliability modeling impacts on architecture under advanced process conditions like TDDB, HCI, and RTN.
• Publication record in international DRAM-related conferences such as ISSCC, VLSI, or IMW is advantageous.