Staff Analog Mixed-Signal Circuit Design Engineer

Role overview

Brightecs Innovation Pte Ltd is looking for a seasoned Staff Analog Mixed-Signal Circuit Design Engineer to drive advanced PLL development from architecture selection through silicon testing and release. The role focuses on delivering high-performance CMOS clocking solutions with excellent jitter, noise, and spur characteristics.

Key responsibilities

• Define advanced CMOS PLL architectures and carry out device-level design and verification.
• Own the full flow from system specification to production-ready design.
• Lead layout execution and chip-level testing activities.
• Target industry-leading performance in jitter, noise, and spur suppression.
• Evaluate and select architectures based on noise, jitter, and spur targets, including integer-N, fractional-N, sub-sampling, and MDLL approaches.
• Develop system parameters such as loop bandwidth, noise margins, noise transfer functions, and spur-reduction methods, then verify behavior from system models through transistor-level simulation using Verilog-A, MATLAB, and SpectreRF.
• Design and validate key circuits including LC VCO, R-VCO, MMD, PFD, charge pump, loop filter, fractional-N SDM, calibration engine, and LDO.
• Optimize noise performance toward sub-100 fs RMS jitter, support multi-GHz tuning ranges, reduce power consumption, and ensure PVT robustness.
• Create calibration logic such as ADC-based VCO gain tracking, background spur reduction, and DTC linearization.
• Lead floor-planning and physical implementation with strong attention to noise reduction, guard rings, shielding, matching, isolation, and EMIR considerations.
• Automate chip verification and tuning workflows using LabVIEW and Python, and analyze phase noise, jitter, lock time, spur, and temperature sensitivity with lab instruments such as oscilloscopes, spectrum analyzers, signal sources, and phase-noise analyzers.
• Prepare design specifications, test plans, results reports, and application notes, and contribute to reusable PLL IP packages including behavioral models, PDK integration, and test platforms.

Requirements

• Bachelor’s, Master’s, or PhD degree in Electronic Engineering, Microelectronics, or a closely related discipline.
• At least 8 years of relevant semiconductor industry experience in a similar role.
• Strong background in custom design and RF design flows at a master level.
• Hands-on familiarity with RF and mixed-signal lab tools, including high-bandwidth oscilloscopes, signal sources, VNAs, spectrum analyzers, phase-noise testers, and probe stations.
• Deep understanding of phase noise, jitter, VCO push/pull behavior, power-supply sensitivity, LO leakage, and spur generation mechanisms.
• Practical scripting and automation ability in Python, MATLAB, and SKILL for data analysis and test automation.
• Strong communication skills with the ability to mentor junior engineers.

Additional information

This is an onsite full-time position based in Singapore, Singapore.

No stipend or salary value was provided in the source.